diff options
author | gdkchan <gab.dark.100@gmail.com> | 2023-06-17 16:28:27 -0300 |
---|---|---|
committer | GitHub <noreply@github.com> | 2023-06-17 16:28:27 -0300 |
commit | f9a538bb0f02b4665f8cccbde0730e08da208024 (patch) | |
tree | bf2412f0ddd744302990c541d74c1ba6da8d3669 /src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs | |
parent | f92921a6d118aa9c6acdb3ecaa3cd61a19fe341e (diff) |
Ensure shader local and shared memory sizes are not zero (#5321)1.1.897
Diffstat (limited to 'src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs')
-rw-r--r-- | src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs index 99d7bec9..40312f4a 100644 --- a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs +++ b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs @@ -27,6 +27,12 @@ namespace Ryujinx.Graphics.Shader.Instructions public static void Atoms(EmitterContext context) { + if (context.Config.Stage != ShaderStage.Compute) + { + context.Config.GpuAccessor.Log($"Atoms instruction is not valid on \"{context.Config.Stage}\" stage."); + return; + } + InstAtoms op = context.GetOp<InstAtoms>(); Operand offset = context.ShiftRightU32(GetSrcReg(context, op.SrcA), Const(2)); @@ -114,6 +120,12 @@ namespace Ryujinx.Graphics.Shader.Instructions public static void Lds(EmitterContext context) { + if (context.Config.Stage != ShaderStage.Compute) + { + context.Config.GpuAccessor.Log($"Lds instruction is not valid on \"{context.Config.Stage}\" stage."); + return; + } + InstLds op = context.GetOp<InstLds>(); EmitLoad(context, StorageKind.SharedMemory, op.LsSize, GetSrcReg(context, op.SrcA), op.Dest, Imm24ToSInt(op.Imm24)); @@ -144,6 +156,12 @@ namespace Ryujinx.Graphics.Shader.Instructions public static void Sts(EmitterContext context) { + if (context.Config.Stage != ShaderStage.Compute) + { + context.Config.GpuAccessor.Log($"Sts instruction is not valid on \"{context.Config.Stage}\" stage."); + return; + } + InstSts op = context.GetOp<InstSts>(); EmitStore(context, StorageKind.SharedMemory, op.LsSize, GetSrcReg(context, op.SrcA), op.Dest, Imm24ToSInt(op.Imm24)); |