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| author | TSRBerry <20988865+TSRBerry@users.noreply.github.com> | 2023-06-28 08:59:13 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-06-28 08:59:13 +0200 |
| commit | 9becbd7d728fc2002c176dfd9d1d1aae86f86b12 (patch) | |
| tree | 4aa3e608f438e706856ec8482c5053c13611caa4 /src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs | |
| parent | e055217292e034e46ebadd2e839b301b996d7064 (diff) | |
[Ryujinx.Graphics.Shader] Address dotnet-format issues (#5373)1.1.929
* dotnet format style --severity info
Some changes were manually reverted.
* Restore a few unused methods and variables
* Silence dotnet format IDE0060 warnings
* Silence dotnet format IDE0052 warnings
* Silence dotnet format IDE0059 warnings
* Address or silence dotnet format CA1069 warnings
* Address or silence dotnet format CA2211 warnings
* Address review comments
* Fix formatting for switch expressions
* Address most dotnet format whitespace warnings
* Apply dotnet format whitespace formatting
A few of them have been manually reverted and the corresponding warning was silenced
* Format if-blocks correctly
* Run dotnet format whitespace after rebase
* Run dotnet format style after rebase
* Run dotnet format whitespace after rebase
* Run dotnet format style after rebase
* Run dotnet format after rebase and remove unused usings
- analyzers
- style
- whitespace
* Disable 'prefer switch expression' rule
* Add comments to disabled warnings
* Fix naming rule violation, Convert shader properties to auto-property and convert values to const
* Simplify properties and array initialization, Use const when possible, Remove trailing commas
* Run dotnet format after rebase
* Address IDE0251 warnings
* Address a few disabled IDE0060 warnings
* Silence IDE0060 in .editorconfig
* Run dotnet format after rebase
* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"
This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.
* dotnet format whitespace after rebase
* First dotnet format pass
* Fix naming rule violations
* Add trailing commas
* Remove unused members and most unnecessary value assignments
* Remove more unnecessary assignments
* Remove NRE suppressor
Diffstat (limited to 'src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs')
| -rw-r--r-- | src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs | 47 |
1 files changed, 25 insertions, 22 deletions
diff --git a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs index 40312f4a..006c14b5 100644 --- a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs +++ b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs @@ -2,7 +2,6 @@ using Ryujinx.Graphics.Shader.Decoders; using Ryujinx.Graphics.Shader.IntermediateRepresentation; using Ryujinx.Graphics.Shader.Translation; using System.Numerics; - using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper; using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper; @@ -48,7 +47,7 @@ namespace Ryujinx.Graphics.Shader.Instructions AtomsSize.S32 => AtomSize.S32, AtomsSize.U64 => AtomSize.U64, AtomsSize.S64 => AtomSize.S64, - _ => AtomSize.U32 + _ => AtomSize.U32, }; Operand id = Const(context.Config.ResourceManager.SharedMemoryId); @@ -85,7 +84,7 @@ namespace Ryujinx.Graphics.Shader.Instructions for (int index = 0; index < count; index++) { - Register dest = new Register(op.Dest + index, RegisterType.Gpr); + Register dest = new(op.Dest + index, RegisterType.Gpr); if (dest.IsRZ) { @@ -309,14 +308,14 @@ namespace Ryujinx.Graphics.Shader.Instructions { LsSize2.B64 => 2, LsSize2.B128 => 4, - _ => 1 + _ => 1, }; Operand baseOffset = context.Copy(srcA); for (int index = 0; index < count; index++) { - Register dest = new Register(rd + index, RegisterType.Gpr); + Register dest = new(rd + index, RegisterType.Gpr); if (dest.IsRZ) { @@ -354,7 +353,7 @@ namespace Ryujinx.Graphics.Shader.Instructions for (int index = 0; index < count; index++) { - Register dest = new Register(rd + index, RegisterType.Gpr); + Register dest = new(rd + index, RegisterType.Gpr); if (dest.IsRZ) { @@ -390,7 +389,7 @@ namespace Ryujinx.Graphics.Shader.Instructions { LsSize2.B64 => 2, LsSize2.B128 => 4, - _ => 1 + _ => 1, }; Operand baseOffset = context.Copy(srcA); @@ -476,22 +475,18 @@ namespace Ryujinx.Graphics.Shader.Instructions LsSize.S8 => StorageKind.GlobalMemoryS8, LsSize.U16 => StorageKind.GlobalMemoryU16, LsSize.S16 => StorageKind.GlobalMemoryS16, - _ => StorageKind.GlobalMemory + _ => StorageKind.GlobalMemory, }; } private static int GetVectorCount(LsSize size) { - switch (size) + return size switch { - case LsSize.B64: - return 2; - case LsSize.B128: - case LsSize.UB128: - return 4; - } - - return 1; + LsSize.B64 => 2, + LsSize.B128 or LsSize.UB128 => 4, + _ => 1, + }; } private static (Operand, Operand) Get40BitsAddress( @@ -544,10 +539,18 @@ namespace Ryujinx.Graphics.Shader.Instructions switch (size) { - case LsSize.U8: value = ZeroExtendTo32(context, value, 8); break; - case LsSize.U16: value = ZeroExtendTo32(context, value, 16); break; - case LsSize.S8: value = SignExtendTo32(context, value, 8); break; - case LsSize.S16: value = SignExtendTo32(context, value, 16); break; + case LsSize.U8: + value = ZeroExtendTo32(context, value, 8); + break; + case LsSize.U16: + value = ZeroExtendTo32(context, value, 16); + break; + case LsSize.S8: + value = SignExtendTo32(context, value, 8); + break; + case LsSize.S16: + value = SignExtendTo32(context, value, 16); + break; } return value; @@ -578,4 +581,4 @@ namespace Ryujinx.Graphics.Shader.Instructions return value; } } -}
\ No newline at end of file +} |