diff options
| author | Ac_K <Acoustik666@gmail.com> | 2023-06-28 17:36:30 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-06-28 17:36:30 +0200 |
| commit | 9288ffd26d0b0b831f62cfc0281c71662d251884 (patch) | |
| tree | 190677d6b4344cd7315ffd0616c5bf7b6055734f /src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs | |
| parent | 2cdc82cb910d03e13d36b6a31148b5b87e35fde9 (diff) | |
Cpu: Implement VCVT (between floating-point and fixed-point) instruction (#5343)1.1.932
* cpu: Implement VCVT (between floating-point and fixed-point) instruction
Rebase, fix and superseed of https://github.com/Ryujinx/Ryujinx/pull/2915
(Since I only have little CPU knowledge, I hope I have done everything good)
* Update Ptc.cs
* Fix wrong cast
* Rename tests
* Addresses feedback
Co-Authored-By: gdkchan <5624669+gdkchan@users.noreply.github.com>
* Remove extra empty line
---------
Co-authored-by: gdkchan <5624669+gdkchan@users.noreply.github.com>
Diffstat (limited to 'src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs')
| -rw-r--r-- | src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs b/src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs new file mode 100644 index 00000000..f8564d0e --- /dev/null +++ b/src/ARMeilleure/Decoders/OpCode32SimdCvtFFixed.cs @@ -0,0 +1,23 @@ +namespace ARMeilleure.Decoders +{ + class OpCode32SimdCvtFFixed : OpCode32Simd + { + public int Fbits { get; protected set; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdCvtFFixed(inst, address, opCode, false); + public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdCvtFFixed(inst, address, opCode, true); + + public OpCode32SimdCvtFFixed(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb) + { + Opc = (opCode >> 8) & 0x1; + + Size = Opc == 1 ? 0 : 2; + Fbits = 64 - ((opCode >> 16) & 0x3f); + + if (DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm)) + { + Instruction = InstDescriptor.Undefined; + } + } + } +}
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