diff options
| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2018-09-08 19:23:07 +0200 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-09-08 14:23:07 -0300 |
| commit | ca1e37a29553f97ecf574fb3678422dd93a2b91d (patch) | |
| tree | 3e082d2f30f60e7b94c263fc2b66cb037a055e6a /Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs | |
| parent | 76a3172f1784bcba209ce070503cfaeff3475449 (diff) | |
Remove old Tester, update Tests (some reworks). (#400)
* Delete Bits.cs
* Delete Integer.cs
* Delete Instructions.cs
* Delete Pseudocode.cs
* Add files via upload
* Add mnemonic.
* Literals all uppercase.
* Nit.
* Allow FPSR control.
* Allow FPSR control.
* Allow FPSR control.
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs b/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs index 1e58a68a..4efd8f31 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs @@ -22,6 +22,7 @@ namespace Ryujinx.Tests.Cpu { uint Opcode = 0x4E285800; // AESD V0.16B, V0.16B Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Vector128<float> V0 = MakeVectorE0E1(RoundKeyL ^ ValueL, RoundKeyH ^ ValueH); Vector128<float> V1 = MakeVectorE0E1(RoundKeyL, RoundKeyH); @@ -37,6 +38,7 @@ namespace Ryujinx.Tests.Cpu Assert.That(GetVectorE0(ThreadState.V1), Is.EqualTo(RoundKeyL)); Assert.That(GetVectorE1(ThreadState.V1), Is.EqualTo(RoundKeyH)); }); + CompareAgainstUnicorn(); } @@ -52,6 +54,7 @@ namespace Ryujinx.Tests.Cpu { uint Opcode = 0x4E284800; // AESE V0.16B, V0.16B Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Vector128<float> V0 = MakeVectorE0E1(RoundKeyL ^ ValueL, RoundKeyH ^ ValueH); Vector128<float> V1 = MakeVectorE0E1(RoundKeyL, RoundKeyH); @@ -67,6 +70,7 @@ namespace Ryujinx.Tests.Cpu Assert.That(GetVectorE0(ThreadState.V1), Is.EqualTo(RoundKeyL)); Assert.That(GetVectorE1(ThreadState.V1), Is.EqualTo(RoundKeyH)); }); + CompareAgainstUnicorn(); } @@ -80,6 +84,7 @@ namespace Ryujinx.Tests.Cpu { uint Opcode = 0x4E287800; // AESIMC V0.16B, V0.16B Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Vector128<float> V = MakeVectorE0E1(ValueL, ValueH); AThreadState ThreadState = SingleOpcode( @@ -100,6 +105,7 @@ namespace Ryujinx.Tests.Cpu Assert.That(GetVectorE1(ThreadState.V1), Is.EqualTo(ValueH)); }); } + CompareAgainstUnicorn(); } @@ -113,6 +119,7 @@ namespace Ryujinx.Tests.Cpu { uint Opcode = 0x4E286800; // AESMC V0.16B, V0.16B Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0); + Vector128<float> V = MakeVectorE0E1(ValueL, ValueH); AThreadState ThreadState = SingleOpcode( @@ -133,6 +140,7 @@ namespace Ryujinx.Tests.Cpu Assert.That(GetVectorE1(ThreadState.V1), Is.EqualTo(ValueH)); }); } + CompareAgainstUnicorn(); } } |