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authorFicture Seven <FICTURE7@gmail.com>2020-04-17 02:19:20 +0400
committerGitHub <noreply@github.com>2020-04-17 08:19:20 +1000
commite4ee61d6c3984d108a9fd9e29c86dd154a04d0c5 (patch)
treea8fc7cdd10b00ae9cc3ff49bd31ea4a1074a4a06 /Ryujinx.Tests/Cpu/CpuTest.cs
parentdfecbbe1f46a10648c754aa5559f60661f2d1189 (diff)
Improve V128 (#1097)
* Improve V128 * Use LayoutKind.Sequential instead * Add As<T>, Get<T> & Set<T> * Fix CpuTest * Rename Get<T> & Set<T> to Extract<T> & Insert<T> * Add XML documentation * Nit
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTest.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTest.cs22
1 files changed, 11 insertions, 11 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTest.cs b/Ryujinx.Tests/Cpu/CpuTest.cs
index 4b7b0f6b..fb9a8f17 100644
--- a/Ryujinx.Tests/Cpu/CpuTest.cs
+++ b/Ryujinx.Tests/Cpu/CpuTest.cs
@@ -414,15 +414,15 @@ namespace Ryujinx.Tests.Cpu
if (fpTolerances == FpTolerances.UpToOneUlpsS)
{
if (IsNormalOrSubnormalS(_unicornEmu.Q[0].AsFloat()) &&
- IsNormalOrSubnormalS(_context.GetV(0).AsFloat()))
+ IsNormalOrSubnormalS(_context.GetV(0).As<float>()))
{
- Assert.That (_context.GetV(0).GetFloat(0),
+ Assert.That (_context.GetV(0).Extract<float>(0),
Is.EqualTo(_unicornEmu.Q[0].GetFloat(0)).Within(1).Ulps);
- Assert.That (_context.GetV(0).GetFloat(1),
+ Assert.That (_context.GetV(0).Extract<float>(1),
Is.EqualTo(_unicornEmu.Q[0].GetFloat(1)).Within(1).Ulps);
- Assert.That (_context.GetV(0).GetFloat(2),
+ Assert.That (_context.GetV(0).Extract<float>(2),
Is.EqualTo(_unicornEmu.Q[0].GetFloat(2)).Within(1).Ulps);
- Assert.That (_context.GetV(0).GetFloat(3),
+ Assert.That (_context.GetV(0).Extract<float>(3),
Is.EqualTo(_unicornEmu.Q[0].GetFloat(3)).Within(1).Ulps);
Console.WriteLine(fpTolerances);
@@ -436,11 +436,11 @@ namespace Ryujinx.Tests.Cpu
if (fpTolerances == FpTolerances.UpToOneUlpsD)
{
if (IsNormalOrSubnormalD(_unicornEmu.Q[0].AsDouble()) &&
- IsNormalOrSubnormalD(_context.GetV(0).AsDouble()))
+ IsNormalOrSubnormalD(_context.GetV(0).As<double>()))
{
- Assert.That (_context.GetV(0).GetDouble(0),
+ Assert.That (_context.GetV(0).Extract<double>(0),
Is.EqualTo(_unicornEmu.Q[0].GetDouble(0)).Within(1).Ulps);
- Assert.That (_context.GetV(0).GetDouble(1),
+ Assert.That (_context.GetV(0).Extract<double>(1),
Is.EqualTo(_unicornEmu.Q[0].GetDouble(1)).Within(1).Ulps);
Console.WriteLine(fpTolerances);
@@ -455,7 +455,7 @@ namespace Ryujinx.Tests.Cpu
private static SimdValue V128ToSimdValue(V128 value)
{
- return new SimdValue(value.GetUInt64(0), value.GetUInt64(1));
+ return new SimdValue(value.Extract<ulong>(0), value.Extract<ulong>(1));
}
protected static V128 MakeVectorScalar(float value) => new V128(value);
@@ -466,8 +466,8 @@ namespace Ryujinx.Tests.Cpu
protected static V128 MakeVectorE0E1(ulong e0, ulong e1) => new V128(e0, e1);
- protected static ulong GetVectorE0(V128 vector) => vector.GetUInt64(0);
- protected static ulong GetVectorE1(V128 vector) => vector.GetUInt64(1);
+ protected static ulong GetVectorE0(V128 vector) => vector.Extract<ulong>(0);
+ protected static ulong GetVectorE1(V128 vector) => vector.Extract<ulong>(1);
protected static ushort GenNormalH()
{