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authorLDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>2020-08-08 17:18:51 +0200
committerGitHub <noreply@github.com>2020-08-08 17:18:51 +0200
commite36e97c64d7b973fbbc3ac92e9f115d74a4d9e2d (patch)
tree80bdb45273e6bbc0d862276bdb6f6551b0a2541d /Ryujinx.Tests/Cpu/CpuTest.cs
parent8d59ad88b4d59ef6ad26b9a747dc871fd1f1007a (diff)
CPU: This PR fixes Fpscr, among other things. (#1433)
* CPU: This PR fixes Fpscr, among other things. * Add Fpscr.Qc = 1 if sat. for Vqrshrn & Vqrshrun. * Fix Vcmp & Vcmpe opcode table. * Revert "Fix Vcmp & Vcmpe opcode table." This reverts commit c117d9410d693185ff5f8ee8e457ffbfb2027dd5. * Address PR feedbacks.
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTest.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTest.cs21
1 files changed, 9 insertions, 12 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTest.cs b/Ryujinx.Tests/Cpu/CpuTest.cs
index 4f5fba9d..12afcfc7 100644
--- a/Ryujinx.Tests/Cpu/CpuTest.cs
+++ b/Ryujinx.Tests/Cpu/CpuTest.cs
@@ -121,11 +121,10 @@ namespace Ryujinx.Tests.Cpu
int fpcr = 0,
int fpsr = 0)
{
- _context.SetX(0, x0);
- _context.SetX(1, x1);
- _context.SetX(2, x2);
- _context.SetX(3, x3);
-
+ _context.SetX(0, x0);
+ _context.SetX(1, x1);
+ _context.SetX(2, x2);
+ _context.SetX(3, x3);
_context.SetX(31, x31);
_context.SetV(0, v0);
@@ -151,8 +150,7 @@ namespace Ryujinx.Tests.Cpu
_unicornEmu.X[1] = x1;
_unicornEmu.X[2] = x2;
_unicornEmu.X[3] = x3;
-
- _unicornEmu.SP = x31;
+ _unicornEmu.SP = x31;
_unicornEmu.Q[0] = V128ToSimdValue(v0);
_unicornEmu.Q[1] = V128ToSimdValue(v1);
@@ -207,7 +205,7 @@ namespace Ryujinx.Tests.Cpu
{
if (Ignore_FpcrFz_FpcrDn)
{
- fpcr &= ~((int)FPCR.Fz | (int)FPCR.Dn);
+ fpcr &= ~((1 << (int)Fpcr.Fz) | (1 << (int)Fpcr.Dn));
}
Opcode(opcode);
@@ -360,7 +358,6 @@ namespace Ryujinx.Tests.Cpu
Assert.That(_context.GetX(28), Is.EqualTo(_unicornEmu.X[28]));
Assert.That(_context.GetX(29), Is.EqualTo(_unicornEmu.X[29]));
Assert.That(_context.GetX(30), Is.EqualTo(_unicornEmu.X[30]));
-
Assert.That(_context.GetX(31), Is.EqualTo(_unicornEmu.SP), "X31");
if (fpTolerances == FpTolerances.None)
@@ -403,9 +400,6 @@ namespace Ryujinx.Tests.Cpu
Assert.That(V128ToSimdValue(_context.GetV(30)), Is.EqualTo(_unicornEmu.Q[30]), "V30");
Assert.That(V128ToSimdValue(_context.GetV(31)), Is.EqualTo(_unicornEmu.Q[31]), "V31");
- Assert.That((int)_context.Fpcr, Is.EqualTo(_unicornEmu.Fpcr), "Fpcr");
- Assert.That((int)_context.Fpsr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpsr & (int)fpsrMask), "Fpsr");
-
Assert.Multiple(() =>
{
Assert.That(_context.GetPstateFlag(PState.VFlag), Is.EqualTo(_unicornEmu.OverflowFlag), "VFlag");
@@ -414,6 +408,9 @@ namespace Ryujinx.Tests.Cpu
Assert.That(_context.GetPstateFlag(PState.NFlag), Is.EqualTo(_unicornEmu.NegativeFlag), "NFlag");
});
+ Assert.That((int)_context.Fpcr, Is.EqualTo(_unicornEmu.Fpcr), "Fpcr");
+ Assert.That((int)_context.Fpsr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpsr & (int)fpsrMask), "Fpsr");
+
if (_usingMemory)
{
byte[] mem = _memory.GetSpan(DataBaseAddress, (int)Size).ToArray();