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| author | gdkchan <gab.dark.100@gmail.com> | 2023-04-25 19:51:07 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-04-25 19:51:07 -0300 |
| commit | 9f12e50a546b15533778ed0d8290202af91c10a2 (patch) | |
| tree | f0e77a7b7c605face5ef29270b4248af2682301a /Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs | |
| parent | 097562bc6c227c42f803ce1078fcb4adf06cd20c (diff) | |
Refactor attribute handling on the shader generator (#4565)1.1.733
* Refactor attribute handling on the shader generator
* Implement gl_ViewportMask[]
* Add back the Intel FrontFacing bug workaround
* Fix GLSL transform feedback outputs mistmatch with fragment stage
* Shader cache version bump
* Fix geometry shader recognition
* PR feedback
* Delete GetOperandDef and GetOperandUse
* Remove replacements that are no longer needed on GLSL compilation on Vulkan
* Fix incorrect load for per-patch outputs
* Fix build
Diffstat (limited to 'Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs')
| -rw-r--r-- | Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs b/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs index 16b02f97..9992ac37 100644 --- a/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs +++ b/Ryujinx.Graphics.Shader/Instructions/InstEmitMove.cs @@ -76,11 +76,11 @@ namespace Ryujinx.Graphics.Shader.Instructions switch (op.SReg) { case SReg.LaneId: - src = Attribute(AttributeConsts.LaneId); + src = context.Load(StorageKind.Input, IoVariable.SubgroupLaneId); break; case SReg.InvocationId: - src = Attribute(AttributeConsts.InvocationId); + src = context.Load(StorageKind.Input, IoVariable.InvocationId); break; case SReg.YDirection: @@ -88,7 +88,7 @@ namespace Ryujinx.Graphics.Shader.Instructions break; case SReg.ThreadKill: - src = context.Config.Stage == ShaderStage.Fragment ? Attribute(AttributeConsts.ThreadKill) : Const(0); + src = context.Config.Stage == ShaderStage.Fragment ? context.Load(StorageKind.Input, IoVariable.ThreadKill) : Const(0); break; case SReg.InvocationInfo: @@ -101,7 +101,7 @@ namespace Ryujinx.Graphics.Shader.Instructions if (context.Config.Stage == ShaderStage.TessellationControl || context.Config.Stage == ShaderStage.TessellationEvaluation) { - src = context.ShiftLeft(Attribute(AttributeConsts.PatchVerticesIn), Const(16)); + src = context.ShiftLeft(context.Load(StorageKind.Input, IoVariable.PatchVertices), Const(16)); } else { @@ -115,9 +115,9 @@ namespace Ryujinx.Graphics.Shader.Instructions break; case SReg.TId: - Operand tidX = Attribute(AttributeConsts.ThreadIdX); - Operand tidY = Attribute(AttributeConsts.ThreadIdY); - Operand tidZ = Attribute(AttributeConsts.ThreadIdZ); + Operand tidX = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(0)); + Operand tidY = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(1)); + Operand tidZ = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(2)); tidY = context.ShiftLeft(tidY, Const(16)); tidZ = context.ShiftLeft(tidZ, Const(26)); @@ -126,39 +126,39 @@ namespace Ryujinx.Graphics.Shader.Instructions break; case SReg.TIdX: - src = Attribute(AttributeConsts.ThreadIdX); + src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(0)); break; case SReg.TIdY: - src = Attribute(AttributeConsts.ThreadIdY); + src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(1)); break; case SReg.TIdZ: - src = Attribute(AttributeConsts.ThreadIdZ); + src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(2)); break; case SReg.CtaIdX: - src = Attribute(AttributeConsts.CtaIdX); + src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(0)); break; case SReg.CtaIdY: - src = Attribute(AttributeConsts.CtaIdY); + src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(1)); break; case SReg.CtaIdZ: - src = Attribute(AttributeConsts.CtaIdZ); + src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(2)); break; case SReg.EqMask: - src = Attribute(AttributeConsts.EqMask); + src = context.Load(StorageKind.Input, IoVariable.SubgroupEqMask, null, Const(0)); break; case SReg.LtMask: - src = Attribute(AttributeConsts.LtMask); + src = context.Load(StorageKind.Input, IoVariable.SubgroupLtMask, null, Const(0)); break; case SReg.LeMask: - src = Attribute(AttributeConsts.LeMask); + src = context.Load(StorageKind.Input, IoVariable.SubgroupLeMask, null, Const(0)); break; case SReg.GtMask: - src = Attribute(AttributeConsts.GtMask); + src = context.Load(StorageKind.Input, IoVariable.SubgroupGtMask, null, Const(0)); break; case SReg.GeMask: - src = Attribute(AttributeConsts.GeMask); + src = context.Load(StorageKind.Input, IoVariable.SubgroupGeMask, null, Const(0)); break; default: |