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authorPiyachet Kanda <piyachetk@gmail.com>2021-12-09 03:05:59 +0700
committerGitHub <noreply@github.com>2021-12-08 17:05:59 -0300
commit3e2f89b4fd863e7052721e735036fc24fd740b40 (patch)
treeae28177844d9c138a89f8c3ef4068b1efb773c7a /ARMeilleure/Instructions
parentacc0b0f3138b0ea4d573db5152927026c29bd61d (diff)
Implement UHADD8 instruction (#2908)
* Implement UHADD8 instruction along with a test unit * Update PTC revision number
Diffstat (limited to 'ARMeilleure/Instructions')
-rw-r--r--ARMeilleure/Instructions/InstEmitAlu32.cs18
-rw-r--r--ARMeilleure/Instructions/InstName.cs1
2 files changed, 19 insertions, 0 deletions
diff --git a/ARMeilleure/Instructions/InstEmitAlu32.cs b/ARMeilleure/Instructions/InstEmitAlu32.cs
index 49fce31d..5f55fcd1 100644
--- a/ARMeilleure/Instructions/InstEmitAlu32.cs
+++ b/ARMeilleure/Instructions/InstEmitAlu32.cs
@@ -472,6 +472,24 @@ namespace ARMeilleure.Instructions
EmitDiv(context, true);
}
+ public static void Uhadd8(ArmEmitterContext context)
+ {
+ OpCode32AluReg op = (OpCode32AluReg)context.CurrOp;
+
+ Operand m = GetIntA32(context, op.Rm);
+ Operand n = GetIntA32(context, op.Rn);
+
+ Operand xor, res;
+
+ res = context.BitwiseAnd(m, n);
+ xor = context.BitwiseExclusiveOr(m, n);
+ xor = context.ShiftRightUI(xor, Const(1));
+ xor = context.BitwiseAnd(xor, Const(0x7F7F7F7Fu));
+ res = context.Add(res, xor);
+
+ SetIntA32(context, op.Rd, res);
+ }
+
public static void Usat(ArmEmitterContext context)
{
OpCode32Sat op = (OpCode32Sat)context.CurrOp;
diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs
index 9b4e8961..ce1c53cc 100644
--- a/ARMeilleure/Instructions/InstName.cs
+++ b/ARMeilleure/Instructions/InstName.cs
@@ -541,6 +541,7 @@ namespace ARMeilleure.Instructions
Trap,
Tst,
Ubfx,
+ Uhadd8,
Umaal,
Umlal,
Umull,