diff options
| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2019-12-30 02:22:47 +0100 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2019-12-29 22:22:47 -0300 |
| commit | 0915731a9dfc4e2b9263d4b30c2876446ff2d9b3 (patch) | |
| tree | 46dd5369be3a2c2a3b8b6021ce164549de2b25e2 /ARMeilleure/Instructions/InstEmitSimdLogical.cs | |
| parent | ad84f3a7b3b409ceab920f480dadcfe6eda62c92 (diff) | |
Implemented fast paths for: (#846)
* opt
* Nit.
* opt_p2
* Nit.
Diffstat (limited to 'ARMeilleure/Instructions/InstEmitSimdLogical.cs')
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitSimdLogical.cs | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/ARMeilleure/Instructions/InstEmitSimdLogical.cs b/ARMeilleure/Instructions/InstEmitSimdLogical.cs index 551752d2..362296f7 100644 --- a/ARMeilleure/Instructions/InstEmitSimdLogical.cs +++ b/ARMeilleure/Instructions/InstEmitSimdLogical.cs @@ -1,6 +1,7 @@ using ARMeilleure.Decoders; using ARMeilleure.IntermediateRepresentation; using ARMeilleure.Translation; +using System.Diagnostics; using static ARMeilleure.Instructions.InstEmitHelper; using static ARMeilleure.Instructions.InstEmitSimdHelper; @@ -107,7 +108,7 @@ namespace ARMeilleure.Instructions res = context.VectorZeroUpper64(res); } - context.Copy(GetVec(op.Rd), res); + context.Copy(d, res); } else { @@ -158,7 +159,7 @@ namespace ARMeilleure.Instructions res = context.VectorZeroUpper64(res); } - context.Copy(GetVec(op.Rd), res); + context.Copy(d, res); } else { @@ -292,11 +293,7 @@ namespace ARMeilleure.Instructions { Operand ne = EmitVectorExtractZx(context, op.Rn, index, 0); - ne = context.ConvertI64ToI32(ne); - - Operand de = context.Call(new _U32_U32(SoftFallback.ReverseBits8), ne); - - de = context.ZeroExtend32(OperandType.I64, de); + Operand de = EmitReverseBits8Op(context, ne); res = EmitVectorInsert(context, res, de, index, 0); } @@ -304,6 +301,20 @@ namespace ARMeilleure.Instructions context.Copy(GetVec(op.Rd), res); } + private static Operand EmitReverseBits8Op(ArmEmitterContext context, Operand op) + { + Debug.Assert(op.Type == OperandType.I64); + + Operand val = context.BitwiseOr(context.ShiftRightUI(context.BitwiseAnd(op, Const(0xaaul)), Const(1)), + context.ShiftLeft (context.BitwiseAnd(op, Const(0x55ul)), Const(1))); + + val = context.BitwiseOr(context.ShiftRightUI(context.BitwiseAnd(val, Const(0xccul)), Const(2)), + context.ShiftLeft (context.BitwiseAnd(val, Const(0x33ul)), Const(2))); + + return context.BitwiseOr(context.ShiftRightUI(val, Const(4)), + context.ShiftLeft (context.BitwiseAnd(val, Const(0x0ful)), Const(4))); + } + public static void Rev16_V(ArmEmitterContext context) { if (Optimizations.UseSsse3) |