diff options
author | gdkchan <gab.dark.100@gmail.com> | 2020-05-03 19:54:50 -0300 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-05-04 08:54:50 +1000 |
commit | f77694e4f774c9391aad5344e70a7c8721cfedc6 (patch) | |
tree | 36bccaeb153bd5d921c751966b8a734a7b4b6ae1 /ARMeilleure/Instructions/InstEmitMemoryHelper.cs | |
parent | 1758424208335d1f4ff7c27c554e517c81bf72f6 (diff) |
Implement a new physical memory manager and replace DeviceMemory (#856)
* Implement a new physical memory manager and replace DeviceMemory
* Proper generic constraints
* Fix debug build
* Add memory tests
* New CPU memory manager and general code cleanup
* Remove host memory management from CPU project, use Ryujinx.Memory instead
* Fix tests
* Document exceptions on MemoryBlock
* Fix leak on unix memory allocation
* Proper disposal of some objects on tests
* Fix JitCache not being set as initialized
* GetRef without checks for 8-bits and 16-bits CAS
* Add MemoryBlock destructor
* Throw in separate method to improve codegen
* Address PR feedback
* QueryModified improvements
* Fix memory write tracking not marking all pages as modified in some cases
* Simplify MarkRegionAsModified
* Remove XML doc for ghost param
* Add back optimization to avoid useless buffer updates
* Add Ryujinx.Cpu project, move MemoryManager there and remove MemoryBlockWrapper
* Some nits
* Do not perform address translation when size is 0
* Address PR feedback and format NativeInterface class
* Remove ghost parameter description
* Update Ryujinx.Cpu to .NET Core 3.1
* Address PR feedback
* Fix build
* Return a well defined value for GetPhysicalAddress with invalid VA, and do not return unmapped ranges as modified
* Typo
Diffstat (limited to 'ARMeilleure/Instructions/InstEmitMemoryHelper.cs')
-rw-r--r-- | ARMeilleure/Instructions/InstEmitMemoryHelper.cs | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/ARMeilleure/Instructions/InstEmitMemoryHelper.cs b/ARMeilleure/Instructions/InstEmitMemoryHelper.cs index e1dec331..b6a4d391 100644 --- a/ARMeilleure/Instructions/InstEmitMemoryHelper.cs +++ b/ARMeilleure/Instructions/InstEmitMemoryHelper.cs @@ -1,6 +1,5 @@ using ARMeilleure.Decoders; using ARMeilleure.IntermediateRepresentation; -using ARMeilleure.Memory; using ARMeilleure.Translation; using System; @@ -11,6 +10,9 @@ namespace ARMeilleure.Instructions { static class InstEmitMemoryHelper { + private const int PageBits = 12; + private const int PageMask = (1 << PageBits) - 1; + private enum Extension { Zx, @@ -318,28 +320,32 @@ namespace ARMeilleure.Instructions private static Operand EmitAddressCheck(ArmEmitterContext context, Operand address, int size) { - long addressCheckMask = ~(context.Memory.AddressSpaceSize - 1); + ulong addressCheckMask = ~((1UL << context.Memory.AddressSpaceBits) - 1); addressCheckMask |= (1u << size) - 1; - return context.BitwiseAnd(address, Const(address.Type, addressCheckMask)); + return context.BitwiseAnd(address, Const(address.Type, (long)addressCheckMask)); } - private static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblFallbackPath) + private static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath) { - Operand pte = Const(context.Memory.PageTable.ToInt64()); + int ptLevelBits = context.Memory.AddressSpaceBits - 12; // 12 = Number of page bits. + int ptLevelSize = 1 << ptLevelBits; + int ptLevelMask = ptLevelSize - 1; + + Operand pte = Const(context.Memory.PageTablePointer.ToInt64()); - int bit = MemoryManager.PageBits; + int bit = PageBits; do { Operand addrPart = context.ShiftRightUI(address, Const(bit)); - bit += context.Memory.PtLevelBits; + bit += ptLevelBits; if (bit < context.Memory.AddressSpaceBits) { - addrPart = context.BitwiseAnd(addrPart, Const(addrPart.Type, context.Memory.PtLevelMask)); + addrPart = context.BitwiseAnd(addrPart, Const(addrPart.Type, ptLevelMask)); } Operand pteOffset = context.ShiftLeft(addrPart, Const(3)); @@ -355,20 +361,16 @@ namespace ARMeilleure.Instructions } while (bit < context.Memory.AddressSpaceBits); - Operand hasFlagSet = context.BitwiseAnd(pte, Const((long)MemoryManager.PteFlagsMask)); + context.BranchIfTrue(lblSlowPath, context.ICompareLess(pte, Const(0L))); - context.BranchIfTrue(lblFallbackPath, hasFlagSet); - - Operand pageOffset = context.BitwiseAnd(address, Const(address.Type, MemoryManager.PageMask)); + Operand pageOffset = context.BitwiseAnd(address, Const(address.Type, PageMask)); if (pageOffset.Type == OperandType.I32) { pageOffset = context.ZeroExtend32(OperandType.I64, pageOffset); } - Operand physAddr = context.Add(pte, pageOffset); - - return physAddr; + return context.Add(pte, pageOffset); } private static void EmitReadIntFallback(ArmEmitterContext context, Operand address, int rt, int size) |