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| author | gdkchan <gab.dark.100@gmail.com> | 2020-03-10 21:49:27 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-11 11:49:27 +1100 |
| commit | c26f3774bdbf3982149a3ea4c0f7abb4de869db7 (patch) | |
| tree | 45805ff76e7a4f486d5132d39ec7f901f462adcb /ARMeilleure/Decoders/OpCode32SimdShImm.cs | |
| parent | 89ccec197ec9a5db2bb308ef3e9178910d1ab7a8 (diff) | |
Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
* Implement VMULL, VMLSL, VQRSHRN, VQRSHRUN AArch32 instructions plus other fixes
* Re-align opcode table
* Re-enable undefined, use subclasses to fix checks
* Add test and fix VRSHR instruction
* PR feedback
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdShImm.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCode32SimdShImm.cs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdShImm.cs b/ARMeilleure/Decoders/OpCode32SimdShImm.cs index b19a601f..53da6bfb 100644 --- a/ARMeilleure/Decoders/OpCode32SimdShImm.cs +++ b/ARMeilleure/Decoders/OpCode32SimdShImm.cs @@ -35,7 +35,7 @@ Instruction = InstDescriptor.Undefined; } - if (DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm)) + if (GetType() == typeof(OpCode32SimdShImm) && DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm)) { Instruction = InstDescriptor.Undefined; } |