aboutsummaryrefslogtreecommitdiff
path: root/ARMeilleure/Decoders/OpCode32SimdS.cs
diff options
context:
space:
mode:
authormerry <git@mary.rs>2022-09-11 03:03:14 +0100
committerGitHub <noreply@github.com>2022-09-10 23:03:14 -0300
commit1529e6cf0dbd42f034b2809485810eb1c88ef7ff (patch)
treec9f5235c2b6f9e97e76489b5ca7f7d2d7c00688a /ARMeilleure/Decoders/OpCode32SimdS.cs
parentf468db76028086a6645856383fecdf8180b04dd1 (diff)
T32: Add Vfp instructions (#3690)1.1.262
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdS.cs')
-rw-r--r--ARMeilleure/Decoders/OpCode32SimdS.cs7
1 files changed, 5 insertions, 2 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdS.cs b/ARMeilleure/Decoders/OpCode32SimdS.cs
index 7bf6af47..63c03c01 100644
--- a/ARMeilleure/Decoders/OpCode32SimdS.cs
+++ b/ARMeilleure/Decoders/OpCode32SimdS.cs
@@ -8,10 +8,13 @@
public int Opc2 { get; } // opc2 or RM (opc2<1:0>) [Vcvt, Vrint].
public int Size { get; protected set; }
- public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdS(inst, address, opCode);
+ public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdS(inst, address, opCode, false);
+ public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdS(inst, address, opCode, true);
- public OpCode32SimdS(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
+ public OpCode32SimdS(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode)
{
+ IsThumb = isThumb;
+
Opc = (opCode >> 15) & 0x3;
Opc2 = (opCode >> 16) & 0x7;