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authorgdkchan <gab.dark.100@gmail.com>2022-01-21 12:47:34 -0300
committerGitHub <noreply@github.com>2022-01-21 12:47:34 -0300
commitf0824fde9f511e9f6d1cda1f80549c93a5d6ce69 (patch)
tree4e4a4c6a7e9be6bef72b9c45dd59be9aa48ec61d /ARMeilleure/CodeGen/X86/CodeGenerator.cs
parent7e967d796cf572377f21af3817a22755c5b01cb1 (diff)
Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)
* Add host CPU memory barriers for DMB/DSB and ordered load/store * PPTC version bump * Revert to old barrier order
Diffstat (limited to 'ARMeilleure/CodeGen/X86/CodeGenerator.cs')
-rw-r--r--ARMeilleure/CodeGen/X86/CodeGenerator.cs8
1 files changed, 7 insertions, 1 deletions
diff --git a/ARMeilleure/CodeGen/X86/CodeGenerator.cs b/ARMeilleure/CodeGen/X86/CodeGenerator.cs
index 72d0e5d8..8d8d3b0a 100644
--- a/ARMeilleure/CodeGen/X86/CodeGenerator.cs
+++ b/ARMeilleure/CodeGen/X86/CodeGenerator.cs
@@ -49,6 +49,7 @@ namespace ARMeilleure.CodeGen.X86
Add(Instruction.Load, GenerateLoad);
Add(Instruction.Load16, GenerateLoad16);
Add(Instruction.Load8, GenerateLoad8);
+ Add(Instruction.MemoryBarrier, GenerateMemoryBarrier);
Add(Instruction.Multiply, GenerateMultiply);
Add(Instruction.Multiply64HighSI, GenerateMultiply64HighSI);
Add(Instruction.Multiply64HighUI, GenerateMultiply64HighUI);
@@ -538,7 +539,7 @@ namespace ARMeilleure.CodeGen.X86
context.Assembler.Lea(dest, memOp, dest.Type);
}
}
- else
+ else
{
ValidateBinOp(dest, src1, src2);
@@ -976,6 +977,11 @@ namespace ARMeilleure.CodeGen.X86
context.Assembler.Movzx8(value, address, value.Type);
}
+ private static void GenerateMemoryBarrier(CodeGenContext context, Operation operation)
+ {
+ context.Assembler.LockOr(MemoryOp(OperandType.I64, Register(X86Register.Rsp)), Const(0), OperandType.I32);
+ }
+
private static void GenerateMultiply(CodeGenContext context, Operation operation)
{
Operand dest = operation.Destination;