diff options
| author | gdkchan <gab.dark.100@gmail.com> | 2023-01-23 19:20:40 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-01-23 19:20:40 -0300 |
| commit | 2fd819613ffcede43562b333602d17fa79c9751d (patch) | |
| tree | 4c00f18a9ebfd356a6af8359cd86e9e5fec1509b | |
| parent | ad6ff6ce99619bb320cc7517768bca603f11a75c (diff) | |
SPIR-V: Change BitfieldExtract and BitfieldInsert for SPIRV-Cross (#4336)1.1.593
* SPIR-V: Change BitfieldExtract and BitfieldInsert types to make Metal MSL compiler happy
* Shader cache version bump
| -rw-r--r-- | Ryujinx.Graphics.Gpu/Shader/DiskCache/DiskCacheHostStorage.cs | 2 | ||||
| -rw-r--r-- | Ryujinx.Graphics.Shader/CodeGen/Spirv/Instructions.cs | 44 |
2 files changed, 23 insertions, 23 deletions
diff --git a/Ryujinx.Graphics.Gpu/Shader/DiskCache/DiskCacheHostStorage.cs b/Ryujinx.Graphics.Gpu/Shader/DiskCache/DiskCacheHostStorage.cs index 9f436502..dcd0eb70 100644 --- a/Ryujinx.Graphics.Gpu/Shader/DiskCache/DiskCacheHostStorage.cs +++ b/Ryujinx.Graphics.Gpu/Shader/DiskCache/DiskCacheHostStorage.cs @@ -22,7 +22,7 @@ namespace Ryujinx.Graphics.Gpu.Shader.DiskCache private const ushort FileFormatVersionMajor = 1; private const ushort FileFormatVersionMinor = 2; private const uint FileFormatVersionPacked = ((uint)FileFormatVersionMajor << 16) | FileFormatVersionMinor; - private const uint CodeGenVersion = 4318; + private const uint CodeGenVersion = 4336; private const string SharedTocFileName = "shared.toc"; private const string SharedDataFileName = "shared.data"; diff --git a/Ryujinx.Graphics.Shader/CodeGen/Spirv/Instructions.cs b/Ryujinx.Graphics.Shader/CodeGen/Spirv/Instructions.cs index 61abf334..14d6ab52 100644 --- a/Ryujinx.Graphics.Shader/CodeGen/Spirv/Instructions.cs +++ b/Ryujinx.Graphics.Shader/CodeGen/Spirv/Instructions.cs @@ -261,17 +261,17 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv private static OperationResult GenerateBitfieldExtractS32(CodeGenContext context, AstOperation operation) { - return GenerateTernaryS32(context, operation, context.Delegates.BitFieldSExtract); + return GenerateBitfieldExtractS32(context, operation, context.Delegates.BitFieldSExtract); } private static OperationResult GenerateBitfieldExtractU32(CodeGenContext context, AstOperation operation) { - return GenerateTernaryS32(context, operation, context.Delegates.BitFieldUExtract); + return GenerateTernaryU32(context, operation, context.Delegates.BitFieldUExtract); } private static OperationResult GenerateBitfieldInsert(CodeGenContext context, AstOperation operation) { - return GenerateQuaternaryS32(context, operation, context.Delegates.BitFieldInsert); + return GenerateBitfieldInsert(context, operation, context.Delegates.BitFieldInsert); } private static OperationResult GenerateBitfieldReverse(CodeGenContext context, AstOperation operation) @@ -2290,39 +2290,39 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv } } - private static OperationResult GenerateTernaryS32( + private static OperationResult GenerateTernaryU32( CodeGenContext context, AstOperation operation, - Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS) + Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitU) { var src1 = operation.GetSource(0); var src2 = operation.GetSource(1); var src3 = operation.GetSource(2); - return new OperationResult(AggregateType.S32, emitS( - context.TypeS32(), - context.GetS32(src1), - context.GetS32(src2), - context.GetS32(src3))); + return new OperationResult(AggregateType.U32, emitU( + context.TypeU32(), + context.GetU32(src1), + context.GetU32(src2), + context.GetU32(src3))); } - private static OperationResult GenerateTernaryU32( + private static OperationResult GenerateBitfieldExtractS32( CodeGenContext context, AstOperation operation, - Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitU) + Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS) { var src1 = operation.GetSource(0); var src2 = operation.GetSource(1); var src3 = operation.GetSource(2); - return new OperationResult(AggregateType.U32, emitU( - context.TypeU32(), - context.GetU32(src1), + return new OperationResult(AggregateType.S32, emitS( + context.TypeS32(), + context.GetS32(src1), context.GetU32(src2), context.GetU32(src3))); } - private static OperationResult GenerateQuaternaryS32( + private static OperationResult GenerateBitfieldInsert( CodeGenContext context, AstOperation operation, Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS) @@ -2332,12 +2332,12 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv var src3 = operation.GetSource(2); var src4 = operation.GetSource(3); - return new OperationResult(AggregateType.S32, emitS( - context.TypeS32(), - context.GetS32(src1), - context.GetS32(src2), - context.GetS32(src3), - context.GetS32(src4))); + return new OperationResult(AggregateType.U32, emitS( + context.TypeU32(), + context.GetU32(src1), + context.GetU32(src2), + context.GetU32(src3), + context.GetU32(src4))); } } } |